\begin{MintedVerbatim}[commandchars=\\\{\}] \PYG{c+cm}{/*** PTAD \PYGZhy{} Port A Data Register; 0x00000000 ***/} \PYG{k}{typedef}\PYG{+w}{ }\PYG{k}{union}\PYG{+w}{ }\PYG{p}{\PYGZob{}} \PYG{+w}{ }\PYG{n}{byte}\PYG{+w}{ }\PYG{n}{Byte}\PYG{p}{;} \PYG{+w}{ }\PYG{k}{struct}\PYG{+w}{ }\PYG{p}{\PYGZob{}} \PYG{+w}{ }\PYG{n}{byte}\PYG{+w}{ }\PYG{n}{PTAD0}\PYG{+w}{ }\PYG{o}{:}\PYG{l+m+mi}{1}\PYG{p}{;}\PYG{+w}{ }\PYG{c+cm}{/* Port A Data Register Bit 0 */} \PYG{+w}{ }\PYG{n}{byte}\PYG{+w}{ }\PYG{n}{PTAD1}\PYG{+w}{ }\PYG{o}{:}\PYG{l+m+mi}{1}\PYG{p}{;}\PYG{+w}{ }\PYG{c+cm}{/* Port A Data Register Bit 1 */} \PYG{+w}{ }\PYG{n}{byte}\PYG{+w}{ }\PYG{n}{PTAD2}\PYG{+w}{ }\PYG{o}{:}\PYG{l+m+mi}{1}\PYG{p}{;}\PYG{+w}{ }\PYG{c+cm}{/* Port A Data Register Bit 2 */} \PYG{+w}{ }\PYG{n}{byte}\PYG{+w}{ }\PYG{n}{PTAD3}\PYG{+w}{ }\PYG{o}{:}\PYG{l+m+mi}{1}\PYG{p}{;}\PYG{+w}{ }\PYG{c+cm}{/* Port A Data Register Bit 3 */} \PYG{+w}{ }\PYG{n}{byte}\PYG{+w}{ }\PYG{n}{PTAD4}\PYG{+w}{ }\PYG{o}{:}\PYG{l+m+mi}{1}\PYG{p}{;}\PYG{+w}{ }\PYG{c+cm}{/* Port A Data Register Bit 4 */} \PYG{+w}{ }\PYG{n}{byte}\PYG{+w}{ }\PYG{n}{PTAD5}\PYG{+w}{ }\PYG{o}{:}\PYG{l+m+mi}{1}\PYG{p}{;}\PYG{+w}{ }\PYG{c+cm}{/* Port A Data Register Bit 5 */} \PYG{+w}{ }\PYG{n+nl}{byte}\PYG{+w}{ }\PYG{p}{:}\PYG{l+m+mi}{1}\PYG{p}{;} \PYG{+w}{ }\PYG{n+nl}{byte}\PYG{+w}{ }\PYG{p}{:}\PYG{l+m+mi}{1}\PYG{p}{;} \PYG{+w}{ }\PYG{p}{\PYGZcb{}}\PYG{+w}{ }\PYG{n}{Bits}\PYG{p}{;} \PYG{+w}{ }\PYG{k}{struct}\PYG{+w}{ }\PYG{p}{\PYGZob{}} \PYG{+w}{ }\PYG{n}{byte}\PYG{+w}{ }\PYG{n}{grpPTAD}\PYG{+w}{ }\PYG{o}{:}\PYG{l+m+mi}{6}\PYG{p}{;} \PYG{+w}{ }\PYG{n+nl}{byte}\PYG{+w}{ }\PYG{p}{:}\PYG{l+m+mi}{1}\PYG{p}{;} \PYG{+w}{ }\PYG{n+nl}{byte}\PYG{+w}{ }\PYG{p}{:}\PYG{l+m+mi}{1}\PYG{p}{;} \PYG{+w}{ }\PYG{p}{\PYGZcb{}}\PYG{+w}{ }\PYG{n}{MergedBits}\PYG{p}{;} \PYG{p}{\PYGZcb{}}\PYG{+w}{ }\PYG{n}{PTADSTR}\PYG{p}{;} \end{MintedVerbatim}